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september 2013 rev 6 1/26 26 vnq660sp quad channel high side solid state relay features cmos compatible inputs off state open load detection undervoltage and overvoltage shutdown overvoltage clamp thermal shutdown current limitation very low standby power dissipation protection against loss of ground and loss of v cc reverse battery protection (a) description the vnq660sp is a monolithic device made by using | stmicroelectronics vipower m0-3 technology, intended for driving resistive or inductive loads with one side connected to ground. this device has four independent channels. built- in thermal shutdown and output current limitation protect the chip from over temperature and short circuit. type r ds(on) i out v cc vnq660sp 50m ? (1) 1. per each channel. 6a 36v a. see application schematic on page 16 powerso-10 1 10 table 1. device summary package order codes tube tape and reel powerso-10 vnq660sp vnq660sp13tr www.st.com
contents vnq660sp 2/26 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16 3.1.1 solution 1: a resistor in the ground line (rgnd only) . . . . . . . . . . . . . . 16 3.1.2 solution 2: a diode (d gnd ) in the ground line . . . . . . . . . . . . . . . . . . . . 17 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 mcu i/o protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.4 maximum demagnetization energy (v cc = 13.5v) . . . . . . . . . . . . . . . . . . 18 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.1 powerso-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.1 ecopack? packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.2 powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.3 powerso-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
vnq660sp list of tables 3/26 list of tables table 1. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 4. thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 5. power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 6. protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 7. v cc - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 8. switching (v cc = 13v; tj = 25c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 9. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 10. openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 11. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 12. electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 13. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 table 14. powerso-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 table 15. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
list of figures vnq660sp 4/26 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 5. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 6. waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 7. off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 8. high level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 9. input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 10. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 11. overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 12. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 13. ilim vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 14. on state resistance vs v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 15. input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 16. input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 17. on state resistance vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 18. input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 19. status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 20. status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 21. status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 22. openload off state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 23. application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 24. maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 25. powerso-10 pc board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 26. rthj-amb vs pcb copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19 figure 27. thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 28. thermal fitting model of a quad channel hsd in powerso-10. . . . . . . . . . . . . . . . . . . . . . 20 figure 29. powerso-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 30. powerso-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 figure 31. powerso-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 figure 32. so-28 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
vnq660sp block diagram and pin description 5/26 1 block diagram and pin description figure 1. block diagram figure 2. configuration diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin status n.c. output input floating x x x x to ground x through 10k resistor undervoltage overvoltage overtemp. 1 overtemp. 2 i lim2 demag 2 i lim1 demag 1 input 1 input 2 gnd v cc output 1 output 2 driver 2 driver 1 logic overtemp. 3 overtemp. 4 i lim4 demag 4 i lim3 demag 3 input 3 input 4 output 3 output 4 driver 4 driver 3 status status open load off-state 1 2 3 4 5 6 7 8 9 10 11 gnd output 4 output 3 output 2 output 1 status input 4 input 3 input 2 input 1 v cc
electrical specifications vnq660sp 6/26 2 electrical specifications 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality document. 2.2 thermal data table 3. absolute maximum ratings symbol parameter value unit v cc supply voltage 41 v - v cc reverse dc supply voltage - 0.3 v i out dc output current, per each channel internally limited a i r reverse dc output current, per each channel - 15 a i in input current +/- 10 ma i stat status current +/- 10 ma i gnd dc ground current at t c < 25c -200 ma v esd electrostatic discharge (human body model: r=1.5k ; c = 100pf) - input - status - output - v cc 4000 4000 5000 5000 v v v v e max maximum switching energy (l = 0.38mh; r l = 0 ; v bat = 13.5v; t jstart = 150oc; i l = 14a) 101 mj p tot power dissipation at t c = 25c 114 w t j junction operating temperature - 40 to 150 c t stg storage temperature - 65 to 150 c e c non repetitive clamping energy at t c = 25c 150 mj table 4. thermal data (per island) symbol parameter value unit r thj-case thermal resistance junction-case 1.1 (1) 52 (2) c/w r thj-amb thermal resistance junction-ambient (one chip on) 51.1 (1) 1. when mounted on a standard single-sided fr-4 board with 1cm 2 of cu (at least 35 m thick). 33 (2) 2. when mounted on a standard single-sided fr-4 board with 6cm 2 of cu (at least 35 m thick). c/w
vnq660sp electrical specifications 7/26 2.3 electrical characteristics values specified in this section are for 6v < v cc < 24v; -40c < t j < 150c, unless otherwise stated. figure 3. current and voltage conventions note: v fn = v ccn - v outn during reverse battery condition. i s i gnd v cc gnd input 4 input 3 i out2 i in3 i in4 v in4 v in3 v cc v out2 i out1 v out1 input 1 i in1 input 2 i in2 v in1 v in2 i stat status v stat output 4 output 3 i out3 i out4 v out4 v out3 output 1 output 2 v f1 (*) table 5. power symbol parameter test conditions min. typ. max. unit v cc (1) operating supply voltage 61336v v usd (1) undervoltage shutdown 3.5 4.6 6 v v uvhyst (1) undervoltage hysteresis 0.2 1 v v ov (1) overvoltage shutdown 36 v v ovhyst (1) overvoltage hysteresis 0.25 v r on on state resistance i out = 1a; t j = 25c 9v < v cc < 18v i out = 1a;t j = 150c 9v < v cc < 18v i out = 1a; v cc = 6v 40 85 50 100 130 m m m i s (1) supply current off state; v cc = 13.5v; v in = v out = 0v off state; v cc = 13.5v; v in = v out = 0v; t j = 25c on state; v cc = 13v; v in = 3.25v; 9v < v cc < 18v 12 12 6 40 25 12 a a ma
electrical specifications vnq660sp 8/26 note: to ensure long term reliability under heavy ov erload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. i l(off1) off state output current v in = v out = 0v 0 50 a i l(off2) off state output current v in = 0v; v out = 3.5v -75 0 a i l(off3) off state output current v in = v out = 0v; v cc = 13v; t j = 125c 5a i l(off4) off state output current v in = v out = 0v; v cc = 13v; t j =25c 3a 1. per device. table 6. protections symbol parameter test conditions min. typ. max. unit t tsd shutdown temperature 150 170 200 c t r reset temperature 135 c t hyst thermal hysteresis 7 15 25 c i lim dc short circuit current 9v < v cc < 36v 6v < v cc < 36v 61018 18 a a v demag turn-off output clamp voltage i out = 2a; v in = 0v; l = 6mh v cc - 41 v cc - 48 v cc - 55 v v stat status low output voltage i stat =1.6ma 0.5 v i lstat status leakage current normal operation; v stat =5v 10 a c stat status pin input capacitance normal operation; v stat =5v 25 pf v scl status clamp voltage i stat =1ma i stat =-1ma 66.8 - 0.7 8v v table 5. power (continued) symbol parameter test conditions min. typ. max. unit table 7. v cc - output diode symbol parameter test conditions min. typ. max. unit v f forward on voltage - i out = 1.6a; t j = 150c 0.6 v
vnq660sp electrical specifications 9/26 figure 4. status timings table 8. switching (v cc = 13v; t j = 25c) symbol parameter test cond itions min. typ. max. unit t d(on) turn-on delay time r l = 13 channels 1,2,3,4 (see figure 5 ) 40 70 s t d(off) turn-off delay time r l = 13 channels 1,2,3,4 (see figure 5 ) 40 140 s dv out /dt (on) turn-on voltage slope r l = 13 channels 1,2,3,4 (see figure 5 ) see figure 10 v/s dv out /dt (off) turn-off voltage slope r l = 13 channels 1,2,3,4 (see figure 5 ) see figure 12 v/s table 9. logic inputs symbol parameter test conditions min. typ. max. unit v il input low level voltage 1.25 v i il input low level current v in = 1.25v 1 a v ih input high level voltage 3.25 v i ih input high level current v in = 3.25v 10 a v i(hyst) input hysteresis voltage 0.5 v c in input capacitance 40 pf v icl input clamp voltage i in = 1ma i in = -1ma 66.8 - 0.7 8v v table 10. openload detection symbol parameter test conditions min. typ. max. unit t sdl status delay see figure 4 20 s v ol openload voltage detection threshold v in = 0v 1.5 2.5 3.5 v t dol openload detection delay at turn-off v cc = 18v (see figure 4 ) 300 s v in v stat t dol openload status timing v in v stat overtemp status timing t sdl t sdl t sdl
electrical specifications vnq660sp 10/26 figure 5. switching characteristics table 11. truth table conditions input output status normal operation l h l h h h current limitation l h h l x x h (t j < t tsd ) h (t j > t tsd ) l overtemperature l h l l h l undervoltage l h l l x x overvoltage l h l l h h output voltage > v ol l h h h l h output current < i ol l h l h h l v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) i sense t t 90% t d(off) input t 90% t d(on) t dsense
vnq660sp electrical specifications 11/26 table 12. electrical transient requirements iso t/r 7637/1 test pulse test level i ii iii iv delays and impedance 1 - 25v - 50v - 75v - 100v 2ms, 10 2 + 25v + 50v + 75v + 100v 0.2ms, 10 3a - 25v - 50v - 100v - 150v 0.1s, 50 3b + 25v + 50v + 75v + 100v 0.1s, 50 4 - 4v - 5v - 6v - 7v 100ms, 0.01 5 + 26.5v + 46.5v + 66.5v + 86.5v 400ms, 2 iso t/r 7637/1 test pulse test level iiiiiiiv 1c c c c 2c c c c 3a c c c c 3b c c c c 4c c c c 5c e e e class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device.
electrical specifications vnq660sp 12/26 figure 6. waveforms status input n normal operation undervoltage v cc v usd v usdhyst input n overvoltage v cc v cc >v ov status n input n status n undefined overtemperature input n status n t tsd t r t j load voltage n v cc vnq660sp electrical specifications 13/26 2.4 electrical characteristics curves figure 7. off state output current figure 8. high level input current -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 1 2 3 4 5 6 7 8 9 10 il(off1) (a ) off state vcc=24v vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 1 2 3 4 5 6 7 iih ( a ) vin=3.25v figure 9. input clamp voltage figure 10. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 6 6.25 6.5 6.75 7 7.25 7.5 7.75 8 vicl (v) ii n =1 m a -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 50 100 150 200 250 300 350 400 450 500 dv out/dt(on) (v/ms) vcc=13v rl=13ohm figure 11. overvoltage shutdown figure 12. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 34 36 38 40 42 44 46 48 50 52 54 vov (v) -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 100 200 300 400 500 600 700 dv out/dt(off) (v/ms) vcc=13v rl=13ohm
electrical specifications vnq660sp 14/26 figure 13. i lim vs t case figure 14. on state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 vih (v) 8 9 10 11 12 13 14 15 16 17 18 19 20 vcc (v) 0 10 20 30 40 50 60 70 80 90 100 rds(on) (mohm) io u t =1 a tc =150oc tc =25oc tc= - 40oc figure 15. input high level figure 16. input hysteresis voltage -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 vihyst (v) figure 17. on state resistance vs tcase figure 18. input low level -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 10 20 30 40 50 60 70 80 90 100 r ds (on) (mo hm) io u t =1 a vc c=9v; 13v; 18v -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 vil (v)
vnq660sp electrical specifications 15/26 figure 19. status leakage current figure 20. status low output voltage -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05 ils ta t (a ) vstat=5v -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 0.075 0.15 0.225 0.3 0.375 0.45 0.525 0.6 vstat (v) is tat=1.6ma figure 21. status clamp voltage figure 22. openload off state detection threshold -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 6.6 6.7 6.8 6.9 7 7.1 7.2 7.3 7.4 vscl (v) is t a t =1 m a -50 -25 0 25 50 75 100 125 150 175 tc (oc ) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 vol (v) vin=0v
application information vnq660sp 16/26 3 application information figure 23. application schematic note: channels 3 & 4 have the same internal circuit as channel 1 & 2. 3.1 gnd protection networ k against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: a resist or in the ground line (r gnd only) this can be used with any type of load. the following show how to dimension the r gnd resistor: 1. r gnd 600mv / 2 (i s(on)max ) 2. r gnd ( - v cc ) / ( - i gnd ) where - i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0 during reverse battery situations) is: p d = ( - v cc ) 2 / r gnd v cc d ld +5v r prot status input1 +5v output3 output1 output2 output4 input3 input4 r prot r prot r prot r prot input2 c gnd d gnd r gnd v gnd .
vnq660sp application information 17/26 this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that, if the microprocessor ground is not shared by the device ground, then the r gnd will produce a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift will vary depending on how ma ny devices are on in the case of several high side drivers sharing the same r gnd . if the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then st suggests using solution 2 below. 3.1.2 solution 2: a diode (d gnd ) in the ground line a resistor (r gnd = 1k ) should be inserted in parallel to d gnd if the device will be driving an inductive load. this small signal diode can be safely shared amongst several different hsd. also in this case, the presence of the ground network will produce a shift (j600mv) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. this shift will not vary if more than one hsd shares the same diode/resistor network. series resistor in input and status lines are also required to prevent that, during battery voltage transient, the current exceeds the absolute maximum rating. safest configuration for unused input and status pin is to leave them unconnected. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc maximum dc rating. the same applies if the device is subject to transients on the v cc line that are greater than those shown in the iso t/r 7637/1 table. 3.3 mcu i/o protection if a ground protection network is used and negative transients are present on the v cc line, the control pins will be pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the c i/o pins from latching up. the value of these resistors is a compromise between the leakage current of c and the current required by the hsd i/o s (input levels compatibility) with the latch-up limit of c i/os: - v ccpeak / i latchup r prot (v oh c - v ih - v gnd ) / i ihmax example for the following conditions: v ccpeak = - 100v i latchup 20ma v oh c 4.5v 5k r prot 65k . recommended values are: r prot = 10k
application information vnq660sp 18/26 3.4 maximum demagnetization energy (v cc = 13.5v) figure 24. maximum turn-off current versus load inductance note: values are generated with r l = 0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves b and c. v in , i l t demagnetization demagnetization demagnetization a = single pulse at t jstart = 150oc b= repetitive pulse at t jstart = 100oc c= repetitive pulse at t jstart = 125oc 1 10 100 0.01 0.1 1 10 100 l(mh) i lmax (a) a b c
vnq660sp package and pcb thermal data 19/26 4 package and pcb thermal data 4.1 powerso-10 thermal data figure 25. powerso-10 pc board note: layout condition of r th and z th measurements (pcb fr4 area = 58mm x 58mm, pcb thickness = 2mm, cu thickness = 35m, copper areas: from minimum pad lay-out to 8 cm 2 ). figure 26. r thj-amb vs pcb copper area in open box free air condition rthjamb (oc/w) 20 25 30 35 40 45 50 55 0246810 pcb cu heatsink area (cm^ 2)
package and pcb thermal data vnq660sp 20/26 figure 27. thermal impedance junction ambient single pulse equation 1 : pulse calculation formula figure 28. thermal fitting model of a quad channel hsd in powerso-10 0.1 1 10 100 1000 0.0001 0.001 0.01 0.1 1 10 100 1000 time (s) zt h (c / w) 0.5 cm 2 2 cm 2 4 cm 2 8 cm 2 z th r th z thtp 1 ? () + = where t p t ? =
vnq660sp package and pcb thermal data 21/26 table 13. thermal parameters area / island (cm 2 )0.5248 r1 = r7 = r9 = r11 (c/w) 0.15 r2 = r8 = r10 = r12 (c/w) 0.5 r3 (c/w) 0.4 r4 (c/w) 10 r5 (c/w) 15 r6 (c/w) 26 14.5 10 6 c1 = c7 = c9 = c11 (w.s/c) 0.0006 c2 = c8 = c10 = c12 (w.s/c) 0.0021 c3 (w.s/c) 0.02 c4 (w.s/c) 0.5 c5 (w.s/c) 1.5 c6 (w.s/c) 5 10 14 18
package and packing information vnq660sp 22/26 5 package and packing information 5.1 ecopack? packages in order to meet environmental requirements, st offers these devices in ecopack? packages. ecopack? packages are lead-free. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at www.st.com. 5.2 powerso-10 mechanical data figure 29. powerso-10 package dimensions detail "a" plane seating l a1 f a1 h a d d1 = = = = e4 0.10 a e c a b b detail "a" seating plane e2 10 1 eb he 0.25
vnq660sp package and packing information 23/26 table 14. powerso-10 mechanical data dim. mm min. typ. max. a 3.35 3.65 a (1) 1. muar only poa p013p. 3.4 3.6 a1 0 0.10 b 0.40 0.60 b (1) 0.37 0.53 c 0.35 0.55 c (1) 0.23 0.32 d 9.40 9.60 d1 7.40 7.60 e 9.30 9.50 e2 7.20 7.60 e2 (1) 7.30 7.50 e4 5.90 6.10 e4 (1) 5.90 6.30 e1.27 f 1.25 1.35 f (1) 1.20 1.40 h 13.80 14.40 h (1) 13.85 14.35 h0.50 l 1.20 1.80 l (1) 0.80 1.10 0 8 (1) 2 8
package and packing information vnq660sp 24/26 5.3 powerso-10 packing information figure 32. so-28 tape and reel shipment (suffix ?tr?) figure 30. powerso-10 suggested pad layout figure 31. powerso-10 tube shipment (no suffix) 6.30 10.8 - 11 14.6 - 14.9 9.5 1 2 3 4 5 1.27 0.67 - 0.73 0.54 - 0.6 10 9 8 7 6 b a c all dimensions are in mm. base q.ty bulk q.ty tube length ( 0.5) ab c ( 0.1) casablanca 50 1000 532 10.4 16.4 0.8 muar 50 1000 532 4.9 17.2 0.8 c a b muar casablanca base q.ty 600 bulk q.ty 600 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 24.4 n (min) 60 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 ( 0.1) 4 component spacing p 24 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 11.5 compartment depth k (max) 6.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions
vnq660sp revision history 25/26 6 revision history table 15. document revision history date revision changes 22-jun-2004 1 initial release. 14-jul-2004 2 new revision. 24-jul-2004 3 minor changes. current and voltage convention update (page 2). configuration diagram (top view) & suggested connections for unused and not connected pins insertion (page 3). 6 cm2 cu condition insertion in thermal data table (page 3). v cc - output diode section update (page 3). protections note insertion (page 4) revision history table insertion (page 18). 28-jul-2004 4 disclaimers update (page 19). 03-dec-2008 5 document reformatted and restructured. added contents, list of tables and figures. added ecopack? packages information. 25-sep-2013 6 updated disclaimer .
docid7497 rev 6 26/26 vnq600sp 26 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. a ll st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industr y domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2013 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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